Miller effect and solutions.

This content was originally published on Microwaves 101 (https://www.microwaves101.com/encyclopedias/miller-effect). Many thanks to Steve for improvements on the original version. Have a look on his website for more interesting content.

In Scientific Papers of the Bureau of Standards, Volume 15, 1919-1920, John M. Miller published a paper in titled “Dependence of the Input Impedance of a Three-Electrode Vacuum Tube Upon the Load in the Plate Circuit.” For this work, Mr. Miller is forever associated with the “Miller effect” which is still relevant a century later.

Mr. Miller was taking about vacuum tubes in his seminal paper, but the concept applies to all three-terminal amplifier devices. In terms of a more modern microwave field-effect transistor (FET), the Miller effect is an increase of the apparent gate to drain capacitance compared to the real one due to a feedback effect from the drain to the gate.

The gate to source capacitance, Cgs, sees at its terminals only the gate voltage, Vg. The drain to source capacitance, Cds, sees at its terminals the the drain voltage, Vl. The drain voltage is basically the gate voltage multiplied by the voltage gain (hey, why do you think it was called an amplifier?) And the gate to drain capacitor sees at its terminals the gate voltage multiplied by (1+A), A being the voltage current of the device in the schematic below. The voltage current being a direct function of the output load. And since the gate to drain capacitor sees a multiplied voltage, its effect is multiplied by the same factor.

Thus the apparent input capacity can become a number of times greater than the actual capacitance between the tube electrodes…

– Miller’s original article, http://www.mit.edu/~klund/papers/jmiller.pdf, page 374

A voltage source of voltage 2vin is connected through a Rs impedance to the gate of a transistor used in common-source amplifier. Its gate has both a parasitic gate to ground capacitance Cgs and a parasitic gate to drain capacitance Cgd. The Miller effect multiplies the parasitic Cgd capacitance. The drain has a parasitic drain to ground capacitance Cgd and produces a voltage vl to a load impedance Rl.

This increase of the apparent capacitance is problematic in broad-band circuits because the bandwidth is reduced when the capacitance increases. In narrowband circuits, the Miller effect is less of a problem because capacitance can always be compensated for by the inductance of the bias circuits. However, keep in mind that the bandwidth of a circuit must be sufficient to keep a margin for process variations.

Some remedies to this problems are:

Two common-sources amplifiers are used in a balanced scheme where, to compensate the parasitic Cgd capacitance between gate and drain of a transistor, the gate of each transistor is connected to the drain of the other one through an additional capacitor of value Cgd. The physical connexion needs a crossover.

The cascode

The image below illustrates a common way to alleviate the Miller effect: the cascode. The load impedance seen by the first transistor is dramatically reduced by the second transistor. In such a configuration, the voltage gain of the first transistor is approximately 11. Since the voltage gain is low, the Miller effect is drastically reduced.

A voltage source of voltage 2vin is connected through a Rs impedance to the gate of a first transistor used in common-source amplifier. Its gate has both a gate to ground capacitance Cgs and a gate to drain capacitance Cgd. This Cgd capacitance is not multiplied in this configuration. The drain has a drain to source capacitance Cds and is connected to the source of a second transistor, used in common gate. This second transistor has a parasitic gate to source capacitor Cgs, a parasitic gate to source capacitor Cgs, a parasitic gate to drain capacitor, and a parasitic drain to source capacitor. The drain produces a voltage Vl to a load impedance Rl.

The second transistor has voltage gain but no current gain. And the Miller effect is eliminated because the gate is grounded for high frequencies. This scheme is usable only up to ft, not fmax. In general, ft is lower than fmax, at least for FET transistors. This should be kept in mind when designing really high frequency amplifiers, for example in the millimeter wave range. Also, an other problem of this scheme is an huge tendency to oscillate. A damping RC network is almost always added to the gate of the second transistor stage to compensate for this problem. Finally, the DC power consumption of the whole amplifier is doubled. Each transistor has a similar VDS voltage across it and the same current flowing into it. Additionally, for low voltage circuits, this scheme doubles the needed bias voltage so it’s problematic. Lot of solutions have been developed to solve this problem but, hey, it’s not an IEEE article here.

Cherry-Hooper amplifiers

Professor Rodwell (UCSB) has some notes on this topic: https://www.ece.ucsb.edu/Faculty/rodwell/Classes/mixed_signal/mixed_signal_notes_set_3.pdf.

References

John M. Miller, “Dependence of the Input Impedance of a Three-Electrode Vacuum Tube Upon the Load in the Plate Circuit”, Scientific Papers of the Bureau of Standards, Volume 15, 1919-1920.

  1. Both transistors are of the same kind, and that RS = 1 / gm.